Simulation of system backend dielectric reliability
نویسندگان
چکیده
Backend dielectric breakdown degrades the reliability of circuits. A methodology to estimate chip lifetime due to backend dielectric breakdown is presented. It incorporates failures due to parallel tracks, the width effect, field enhancement due to line ends, and variation in activity and temperature. Different workloads are considered as well, in order to evaluate aging effects in microprocessors running realworld applications with realistic use conditions. & 2014 Elsevier Ltd. All rights reserved.
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ورودعنوان ژورنال:
- Microelectronics Journal
دوره 45 شماره
صفحات -
تاریخ انتشار 2014